The T-COR-31 FPGA IP core implements the algorithm of automatic tracking of objects in video and calculation of their parameters for solving guidance and targeting tasks. The IP core is a standalone module easily integrable into projects based on fieldprogrammable gate arrays (FPGA) and application-specific integrated circuits (ASIC). The core interfaces are universalized for connection to IP cores of other manufacturers. The use of the T-COR-31 IP core will allows you to create your own effective machine vision systems for solving problems in fire control, weapons guidance and perimeter control with a significant reduction of the development time.
DELIVERY AND REQUIRED RESOURCES
The T-COR-31 IP core is supplied as archive file to be in-cluded into Xilinx® Vivado IDE projects or as a QSP file and VERILOG file with description of input/output ports for Altera® Quartus IDE system. Below is the list of resources required for FPGA Xilinx® 7 series ICs.
- LUT ~ 39000 (Xilix 7 series);
- FF (Registers) ~ 46000 (Xilix 7 series);
- BRAM ~ 82 (Xilix 7 series) (Xilix 7 series);
- DSP ~ 16 (Xilix 7 series);
FIELD OF APPLICATIONS
The IP core can be used in smart sights, portable and stationary target acquisition systems, unmanned aerial vehicles, weapon stations, fire control systems, anti-aircraft complexes and homing heads.
HOSTING PLATFORMS AND COMPATIBILITY
The FPGA IP core can make use of any computer modules based on microcircuits manufactured by Xilinx® and Altera® companies. Besides, the core can be adapted for use in application-specific integrated circuits (ASIC). Owing to easy integration, fast prototyping is possible for evaluation of the IP core performance characteristics. The device is compatible with Xilinx® Vivado and Altera® Quartus IDE systems.
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